3-D ICs
Thread Rating:
  • 0 Vote(s) - 0 Average
  • 1
  • 2
  • 3
  • 4
  • 5
seminar projects crazy
Active In SP

Posts: 604
Joined: Dec 2008
30-01-2009, 11:44 PM

There is a saying in real estate; when land get expensive, multi-storied buildings are the alternative solution. We have a similar situation in the chip industry. For the past thirty years, chip designers have considered whether building integrated circuits multiple layers might create cheaper, more powerful chips.

Performance of deep-sub micrometer very large scale integrated (VLSI) circuits is being increasingly dominated by the interconnects due to increasing wire pitch and increasing die size. Additionally, heterogeneous integration of different technologies on one single chip is becoming increasingly desirable, for which planar (2-D) ICs may not be suitable.

The three dimensional (3-D) chip design strategy exploits the vertical dimension to alleviate the interconnect related problems and to facilitate heterogeneous integration of technologies to realize system on a chip (SoC) design. By simply dividing a planar chip into separate blocks, each occupying a separate physical level interconnected by short and vertical interlayer interconnects (VILICs), significant improvement in performance and reduction in wire-limited chip area can be achieved.

In the 3-Ddesign architecture, an entire chip is divided into a number of blocks, and each block is placed on a separate layer of Si that are stacked on top of each other.
Use Search at http://topicideas.net/search.php wisely To Get Information About Project Topic and Seminar ideas with report/source code along pdf and ppt presenaion

Important Note..!

If you are not satisfied with above reply ,..Please


So that we will collect data for you and will made reply to the request....OR try below "QUICK REPLY" box to add a reply to this page
Popular Searches: mini projects using ics and diodes, information search to ics in computer system, low cost electronics projects ics 555, 3d ics ppt, a project of implemenatation of ics using vhdl, demorgan s theorem proof by ics, seminar top ics,

Quick Reply
Type your reply to this message here.

Image Verification
Please enter the text contained within the image into the text box below it. This process is used to prevent automated spam bots.
Image Verification
(case insensitive)

Possibly Related Threads...
Thread Author Replies Views Last Post
  SEMINAR REPORT ON ANDROID ICS vs iOS6 vs Windows Phone 7.5 project girl 0 538 12-12-2012, 03:03 PM
Last Post: project girl
  3D ICs report project girl 0 285 14-11-2012, 01:18 PM
Last Post: project girl
  3-D ICs report project girl 0 223 07-11-2012, 04:32 PM
Last Post: project girl
  3- D ICs small details seminar ideas 0 377 22-06-2012, 02:57 PM
Last Post: seminar ideas
  3d ics computer science crazy 7 5,629 27-04-2011, 11:17 AM
Last Post: seminar class