A 64 Point Fourier Transform Chip
Thread Rating:
  • 0 Vote(s) - 0 Average
  • 1
  • 2
  • 3
  • 4
  • 5
computer science crazy
Super Moderator

Posts: 3,048
Joined: Dec 2008
17-09-2009, 12:36 AM

A 64 Point Fourier Transform Chip

Fourth generation wireless and mobile system are currently the focus of research and development. Broadband wireless system based on orthogonal frequency division multiplexing will allow packet based high data rate communication suitable for video transmission and mobile internet application. Considering this fact we proposed a data path architecture using dedicated hardwire for the baseband processor. The most computationally intensive part of such a high data rate system are the 64-point inverse FFT in the transmit direction and the viterbi decoder in the receiver direction. Accordingly an appropriate design methodology for constructing them has to be chosen a) how much silicon area is needed b) how easily the particular architecture can be made flat for implementation in VLSI c) in actual implementation how many wire crossings and how many long wires carrying signals to remote parts of the design are necessary d) how small the power consumption can be .This paper describes a novel 64-point FFT/IFFT processor which has been developed as part of a large research project and implimentation to develop a single chip wireless modem.


The discrete fourier transformation A® of a complex data sequence B(k) of length N
where r, k ={0,1¦¦, N-1} can be described as
Where WN = e-2?j/N . Let us consider that N=MT , ? = s+ Tt and k=l+Mm,where s,l ? {0,1¦..7} and m, t ? {0,1,¦.T-1}. Applying these values in first equation and we get
This shows that it is possible to realize the FFT of length N by first decomposing it to one M and one T-point FFT where N = MT, and combinig them. But this results in in a two dimensional instead of one dimensional structure of FFT. We can formulate 64-point by considering M =T = 8

This shows that it is possible to express the 64-point FFT in terms of a two dimensional structure of 8-point FFTs plus 64 complex inter-dimensional constant multiplications. At first, appropriate data samples undergo an 8-point FFT computation. However, the number of non-trivial multiplications required for each set of 8-point FFT gets multiplied with 1. Eight such computations are needed to generate a full set of 64 intermediate data, which once again undergo a second 8-point FFT operation . Like first 8-point FFT for second 8-point again such computions are required. Proper reshuffling of the data coming out from the second 8-point FFT generates the final output of the 64-point FFT .
Fig. Signal flow graph of an 8-point DIT FFT.
For realization of 8-point FFT using the conventional DIT does not need to use any multiplication operation.

The constants to be multiplied for the first two columns of the 8-point FFT structure are either 1 or j . In the third column, the multiplications of the constants are actually addition/subtraction operation followed multiplication of 1/?2 which can be easily realized by using only a hardwired shift-and-add operation. Thus an 8-point FFT can be carried out without using any true digital multiplier and thus provide a way to realize a low- power 64-point FFT at reduced hardware cost. Since a basic 8-point FFT does not need a true multiplier. On the other hand, the number of non-trivial complex multiplications for the conventional 64-point radix-2 DIT FFT is 66. Thus the present approach results in a reduction of about 26% for complex multiplication compared to that required in the conventional radix-2 64-point FFT. This reduction of arithmetic complexity furthur enhances the scope for realizing a low-power 64-point FFT processor. However, the arithmetic complexity of the proposed scheme is almost the same to that of radix-4 FFT algorithm since the radix-4 64-point FFT algorithm needs 52 non-trivial complex multiplications.
Use Search at http://topicideas.net/search.php wisely To Get Information About Project Topic and Seminar ideas with report/source code along pdf and ppt presenaion
computer science crazy
Super Moderator

Posts: 3,048
Joined: Dec 2008
28-11-2009, 07:37 PM

please use this link its ieee article , if you have ieee access please download (or ask your friends to give)

or use the similar articles to a new one
Use Search at http://topicideas.net/search.php wisely To Get Information About Project Topic and Seminar ideas with report/source code along pdf and ppt presenaion
seminar paper
Active In SP

Posts: 6,455
Joined: Feb 2012
03-04-2012, 11:37 AM

to get information about the topic "64 Point fourier transform chip" full report ppt and related topic refer the link bellow




Important Note..!

If you are not satisfied with above reply ,..Please


So that we will collect data for you and will made reply to the request....OR try below "QUICK REPLY" box to add a reply to this page
Tagged Pages: 64 point fourier transform chip, seminar topic of a 64 point fourier transform chip, 64 point fft algorithm for seminaar, a 64 point fourier transform chip,
Popular Searches: matlab fourier transform code, fourier transform de, project report on a 64 point fourier transform chip, applications of fourier transform, seminar topics forier transform, spectrum pooling role of internet technology in future mobile data system a 64 point fourier transform chip ieee document, fourier mellin transform matlab code,

Quick Reply
Type your reply to this message here.

Image Verification
Please enter the text contained within the image into the text box below it. This process is used to prevent automated spam bots.
Image Verification
(case insensitive)

Possibly Related Threads...
Thread Author Replies Views Last Post
  3 point starter ppt jaseelati 0 236 07-01-2015, 04:39 PM
Last Post: jaseelati
  BLOOD VESSEL ENHANCEMENT AND SEGMENTATION USING WAVELET TRANSFORM science projects buddy 10 4,494 11-04-2014, 09:34 AM
Last Post: seminar project topic
  A SYSTEM ON A CHIP REPORT seminar projects maker 0 335 14-09-2013, 03:11 PM
Last Post: seminar projects maker
  REPLACING PASSPORT USING BIO-CHIP pdf seminar projects maker 0 377 13-09-2013, 12:12 PM
Last Post: seminar projects maker
  System-on-chip design methodology in engineering education pdf study tips 0 415 02-08-2013, 01:03 PM
Last Post: study tips
  A 0.5-V Biomedical System-on-a-Chip for Intrabody Communication System pdf project girl 4 1,262 26-07-2013, 11:16 AM
Last Post: study tips
  IMAGE COMPRESSION USING DISCRETE COSINE TRANSFORM seminar class 4 5,621 22-07-2013, 09:25 AM
Last Post: study tips
  Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, USB 2.0 study tips 0 302 20-07-2013, 03:37 PM
Last Post: study tips
  APR9600 RE-Recording Voive IC - Single-Chip Voice Recording & Playback Device study tips 0 406 02-07-2013, 04:55 PM
Last Post: study tips
  Video/Imaging Fixed-Point Digital Signal Processor pdf study tips 0 443 20-06-2013, 04:36 PM
Last Post: study tips