IMPLEMENTATION OF SRAM USING MICRO WIND TOOL
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27-09-2010, 04:21 PM
IMPLEMENTATION OF SRAM USING MICRO WIND TOOL1.doc (Size: 517.5 KB / Downloads: 207)
Data storage is a growing need in these days. With the advent of new technologies the concept of “more data in less space” is gaining importance day by day.
Most commonly used semiconductor memory is SRAM. Static Random Access Memory (SRAM) is a type of semiconductor memory where the word static indicates that unlike Dynamic RAM (DRAM) it does not need to be periodically refreshed, as SRAM is volatile in the conventional sense that data is eventually lost when the memory is not powered. A single cell of SRAM can be constructed using 6T or 5T or 4T. The operation of SRAM can be well understood by studying the working the 6T SRAM cell. Each bit in the 6T SRAM cell is stored on four transistors that form two cross coupled inverters. This storage cell has two stable states which are used to denote 0 and 1. Two additional transistors serve to control the access to a storage cell during read and write operations.
This work presents a detailed study of SRAM and its implementation at layout level using MICRO WIND-A LAYOUT LEVEL SIMULATION TOOL.
An overview of data storage devices
Data storage devices are primarily used to store the data either temporarily or permanently depending on the application. From the beginning of the electronics industry, storage of data has been a major point of consideration. Many storage devices have been developed by now, with various working principles and data storage techniques
Data storage devices can be classified by a wide variety of aspects, but most frequently they are divided by technology into the semiconductor types and the moving media types which require mechanical equipment for operation. Memories are circuits or systems that store digital information in large quantity, hence are vital components in modern integrated circuits.
Memory developers have to design memories to address the issues in bandwidth, latency, density, power and cost. Unfortunately, it is not possible for a single memory technology to address all these issues with distinct advantages - this translates to an arsenal of components available for designers to architect their system.