LOW POWER DESIGN BY CLOCK GATING
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31-01-2009, 12:44 AM
The rapid development of multimedia applications and the Internet has led to the demand of mobility for these services. New wireless standards support high data rates and additional services, but they require complex realizations in both front-end and base band of a mobile system. The obtainable performance of such a system is often limited by the power consumption of the implementation, as long stand-by and talk times are still key parameters of a mobile terminal. Also the thermal problem, given by insufficient heat removal with highly integrated high-performance circuits in narrow-spaced terminals, calls for optimizations concerning power consumption.
Meanwhile, integrated-circuit densities and operating speeds have continued to climb, proving Moore's law again and again. But chips cannot get more complex, faster, and larger without their hunger for power growing as well. In fact, with pleas for portability adding to the usual clamor for more features and faster operation, power consumption has in many cases become the limiting factor in fulfilling market demand.
This is where low power design comes in. Neither improvements in battery or semiconductor technology nor external cooling solve the fundamental problem of power consumption in the development of portable or non-portable applications. Therefore, low power design methods play an important role in IC design.
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