Reconfigurable computing
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Reconfigurable computing is a computing paradigm combining some of the flexibility of software with the high performance of hardware by processing with very flexible high speed computing fabrics like FPGAs. The principal difference when compared to using ordinary microprocessors is the ability to make substantial changes to the datapath itself in addition to the control flow. On the other hand, the main difference with custom hardware (ASICs) is the possibility to adapt the hardware during runtime by "loading" a new circuit on the reconfigurable fabric.The concept of reconfigurable computing has existed since the 1960s, when Gerald Estrin's landmark paper proposed the concept of a computer made of a standard processor and an array of reconfigurable hardware.The main processor would control the behavior of the reconfigurable hardware. The latter would then be tailored to perform a specific task, such as image processing or pattern matching, as quickly as a dedicated piece of hardware. Once the task was done, the hardware could be adjusted to do some other task. This resulted in a hybrid computer structure combining the flexibility of software with the speed of hardware; unfortunately this idea was far ahead of its time in needed electronic technology. In the eighties and nineties, there was a renaissance in this area of research with many proposed reconfigurable architectures developed in industry and academia, such as: Matrix, Garp, Elixent, PACT XPP, Silicon Hive, Montium, Pleiades, Morphosys, PiCoGA. Such designs were feasible due to the constant progress of silicon technology that let complex designs be implemented on one chip. The world's first commercial reconfigurable computer, the Algotronix CHS2X4, was completed in 1991. It was not a commercial success, but was promising enough that Xilinx (the inventor of the Field-Programmable Gate Array, FPGA) bought the technology and hired the Algotronix staff.
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02-07-2010, 07:10 PM

Reconfigurable computing
Reconfigurable computing is a computer architecture which combines flexibility of software with the high performance of hardware by processing using the field-programmable gate arrays (FPGAs). We can make changes to the datapath itself in addition to the control flow. application-specific integrated circuits (ASICs) differs from it in that it can "load" a new circuit on the reconfigurable fabric.

Current systems
The present systems are classified into hybrid computer and fully FPGA based . A hybrid computer has reconfigurable logic chip, FPGAs, with a standard microprocessor. they are Von-Neumann based architectures with an integrated FPGA accelerator.
Whereas the fully FPGA based computers doesn't have any CPUs or uses the CPUs only as interface to the network environment.

Comparison of systems

Many new reconfigurable architectures are still being developed. The following properties are used to classify the systems:

It is the size of the smallest functional unit (configurable logic block, CLB) handled by the mapping tools. High granularity means higher flexibility when implementing algorithms into the hardware. for the algorithms needing word-width data paths, Coarse-grained architectures (rDPA) has been designed

-Rate of reconfiguration:
This can occur between execution phases or during execution. a bit stream is used to program the device at deployment time.

-Host coupling:type of data transfers, latency, power, throughput and overheads is determined by the level of coupling.
-tool flow

for more details, refer these links:

.pdf   an intro to reconfigurable computing.pdf (Size: 121.1 KB / Downloads: 147)
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