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Joined: Feb 2011
28-02-2011, 04:23 PM

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To Design and Simulate a Schmitt trigger
Schmitt trigger is a wave shaping circuit used for generation of a square wave from a sine wave input .It is a bi stable circuit in which two transistor switches are connected regeneratively. If the two transistors are Q1 and Q2 ,when Q1 is ON then Q2 is OFF or when Q2 is ON then Q1 is at OFF position.
Schmitt trigger consists of two identical transistors Q1 and Q2 coupled through an emitter resistor Re. Resistors R1 and Rb2 form a voltage divider across vc1 and ground. This provides a small forward bias to the base –emitter junction of transistor Q2. When the supply is switched ON ,with no input signal ,transistor Q2 starts conducting. The rise in current (Ie) of Q2causes a voltsge drop across Re ,i.e. Vre = IeRe. This voltage provides a reverse bias across the emitter-base junction of Q1 and it is driven into cut-off state. Since Q1 is in OFF state ,the voltage at its collector rises to Vcc since the collector of Q1 is coupled to base of Q2 through the resistor R1,the forward bias for the transistor Q2 is increased. Thus Q2 is driven into saturation. At this instant the collector voltage levels are Vc1=Vcc and Vc2=Vce(sat)+Vre.
Consider an AC signal of sinusoidal or triangular variation is applied to the base of Q1.When the voltage increases above zero nothing will happen till it crosses the upper trigger level(UTL).As the input level increases above UTL, i.e. Vin <=Vre+Vbe1,Q1conducts.The point at which the Q1 starts conducting is known as upper trigger point(UTP).As transistor Q1 conducts ,its collector voltage falls below Vcc. Since the collector of Q1 is coupled to the base of Q2 the forward bias to Q2 is reduced. This in turn reduces the current of transistor Q2 and hence the voltage drop across Re. As a result the reverse bias of transistor Q1 is reduced and it conducts more which drives Q2 to nearer to cut-off. At this instance, the collector voltage levels are Vc1=Vce(sat) + Vre and Vc2=Vcc.
Transistor Q1 will continue to conduct till the input voltage crosses the lower trigger level (LTL) .When the input voltage becomes equal to LTL, the emitter-base junction of Q1 becomes reverse biased, i.e. Vin < Vre + Vbe1 .Hence its collector voltage starts rising towards Vcc. This forward biases Q2 and it starts conducting. The point at which Q2 starts conducting is called lower triggering point(LTP).Then Q2 is very quickly driven into saturation and Q! is cut-off. At this instant the collector voltage levels are Vc1 = Vcc and Vc2 = Vce(sat) + Vre. No change in state will occur during the negative half-cycle of the input voltage.
The capacitor C1 is speed-up capacitor .It improves the switching of the circuit.It can be observed during the switching,the change in the collector voltage Vc1 gets divided across R1 and R2 before it gets applied to the base of Q2.The capacitor C1 eliminates the potential division thus by whatever amount Vc1 changes the same amount Vb2 changes because of C1.This increases the switching speed and the and thus C1 acts as a speed-up capacitor

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