The Tiger SHARC processor
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Computer Science Clay
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25-02-2009, 03:09 PM

The Tiger SHARC processor

In the past three years several multiple data path and pipelined digital signal processors have been introduced into the marketplace. This new generation of DSP's takes advantage of higher levels of integrations than were available for their predecessors. The Tiger SHARC processor is the newest and most power member of this family which incorporates many mechanisms like SIMD, VLIW and short vector memory access in a single processor. This is the first time that all these techniques have been combined in a real time processor.The TigerSHARC DSP is an ultra high-performance static superscalar architecture that is optimized for tele-communications infrastructure and other computationally demanding applications.

This unique architecture combines elements of RISC, VLIW, and standard DSP processors to provide native support for 8, 16, and 32-bit fixed, as well as floating-point data types on a single chip.Large on-chip memory, extremely high internal and external bandwidths and dual compute blocks provide the necessary capabilities to handle a vast array of computationally demanding, large signal processing tasks.
Strictly speaking, the term "DSP" applies to any microprocessor that operates on digitally represented signals. most DSP processors include specialized on-chip peripherals or I/O interfaces that allow the processor to efficiently interface with other system components, such as analog-to-digital converters and host processors.The word "SHARC" implies Super Harvard ARChitecture.

The SHARC architecture has been improved greatly and the most powerful DSP today known has been implemented by Analog Devices and due to the high performance it yields it is called "Tiger" SHARC.The first implementation of the Tiger SHARC architecture is in a 0.25 micron, five level metal process at 150 MHz core clock speed. It delivers 900 MFlops (10 to the power 9 floating point operations per second) of single precision floating point performance or 3.6 GOPS of 16-bit arithmetic performance. It sustains an internal data bandwidth of 7.2 Gbytes /sec.
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